Experienced FPGA Design Engineer - Position 145

  • 2-5 years of experience in ASIC or FPGA design (RTL level)
  • Proficiency in Verilog / VHDL
  • Proficiency in FPGA synthesis - Advantage
  • Experience in high speed communication design
  • Knowledge of communication protocols (like GPON, Ethernet, SONET) – Advantage
  • B.Sc. in Electrical Engineering or Computer Sciences
             The  position requires system level understanding 

            Contact us at jobs@tracespan.com